Number Representation Questions in GATE CSE Digital Logic

Number representation is the part of Digital Logic that almost never changes shape. The question is either a bit pattern you must turn into a decimal value, a decimal value you must turn into a bit pattern, or a statement about ranges, overflow and precision that you must mark true or false. The computation is short. The marks are lost on details: which direction the bias goes, whether a carry out means overflow, how many fraction bits are actually stored.

Key takeaways

• The $n$-bit two's complement range is $-2^{n-1}$ to $2^{n-1} - 1$, and the most negative value has no positive counterpart.
• Negate by inverting every bit and adding one. Doing this to the most negative number returns the same number.
• Overflow in signed addition needs both operands to share a sign and the result to differ. Carry out alone is not overflow.
• Sign extension replicates the sign bit; zero extension does not. Choosing the wrong one changes the value.
• IEEE 754 single precision stores 23 fraction bits with an implicit leading one, bias 127; double stores 52 bits with bias 1023.
• The gap between representable floating point numbers scales with the exponent, so a small addend can vanish entirely.

What the 2027 syllabus puts in scope

The official GATE 2027 CS syllabus gives Digital Logic as Boolean algebra and minimization with algebraic, Karnaugh map and tabular techniques, design of combinational and sequential circuits, and number representation and arithmetic in fixed and floating point. The 2026 wording said number representations and computer arithmetic. Nothing was added or removed from this clause for 2027; the rewriting touched the minimization and circuit-design clauses. Check the current notification before planning around it.

That one clause covers base conversion, unsigned and signed formats, fixed-point resolution, two's complement arithmetic with overflow, and the whole of IEEE 754 including special values, precision and rounding. The same material reappears inside Computer Organization when ALU and floating-point units are tested, which is why an afternoon spent here pays twice. The wider subject map is in the Digital Logic important topics guide.

How much this is worth

Analyst compilations, unofficial and disagreeing with each other by two or three marks because borderline questions get filed under Computer Organization, put Digital Logic at 5, 7, 8, 3, 3, 2.3, 5.7, 3, 3, 4, 9, 4, 4, 3, 6, 5, 6 and 5 marks per paper from 2009 to 2026. That averages about 4.8, low 2.3, high 9. By era, 2009 to 2017 averages 4.4 and 2018 to 2026 averages 5.1, so the direction is stable with spikes in 2011 and 2019. One analyst counted four Digital Logic questions in 2026 shift 2.

The book treats Digital Logic as a low-weight subject at an expected 4 to 7 marks for 2027, while noting that it is one of the two most formula-stable subjects and returns the best marks per hour of preparation. Analysts rate General Aptitude and Digital Logic the easiest parts of the paper, and within this subject K-maps, counters and flip-flops, and number representation are the recurring items.

Two's complement: the asymmetry is the exam

In $n$ bits, the sign bit carries weight $-2^{n-1}$ while the remaining bits carry their ordinary positive weights. The value of a pattern is therefore the sign term plus the unsigned value of the low $n-1$ bits:

That single formula explains the range. The smallest value is 1000...0, equal to $-2^{n-1}$. The largest is 0111...1, equal to $2^{n-1} - 1$. There are $2^n$ codes, one is zero, and the rest split $2^{n-1}$ negatives against $2^{n-1} - 1$ positives.

To negate, invert every bit and add one. Try it on 8-bit 10000000, which is -128: inverting gives 01111111 and adding one returns 10000000. The most negative number is its own negation, because +128 does not exist in 8 bits. That is the source of the classic statement-marking question.

Sign-magnitude and one's complement both waste a code on negative zero, which is why each represents one fewer distinct value than two's complement at the same width. A question phrased as the difference between the counts of representable values in two systems is asking exactly this, and the answer is one.

Two's complement also removes the need for a subtractor. $A - B$ is $A + \overline{B} + 1$, that is, $A$ plus the complement of $B$ plus one, which is why one adder with a row of inverters and a carry-in of one does both operations.

Overflow, and why a carry out is not overflow

Overflow in signed addition means the true mathematical sum falls outside the representable range. Two equivalent tests:

• Both operands have the same sign and the result has the opposite sign.
• The carry into the sign bit differs from the carry out of the sign bit.

Both say the same thing, and both say that adding numbers of opposite signs can never overflow, since such a sum is bounded by the larger operand's magnitude, which already fits.

The carry out of the most significant bit is the unsigned overflow flag, and in signed arithmetic it means nothing on its own. Add 8-bit 11111111 and 00000001: the carry out is 1, but the operands are -1 and +1, the result is 00000000, and that is correct. Now add 01000000 and 01000000: no carry out at all, but both operands are +64, the result 10000000 reads as -128, and that is overflow. Hardware keeps two separate flags, and a question mentioning only one of them is usually testing whether you know which.

Sign extension, zero extension and comparison

Widening a value from n bits to m bits is not one operation. If the value is signed, copy the sign bit into every new high-order position. If it is unsigned, fill with zeros. The 8-bit pattern 11111100 becomes 1111111111111100 in 16 bits when sign-extended, which is still -4, but 0000000011111100 when zero-extended, which is 252.

The same fork appears in comparison. The patterns 11111111 and 00000001 compare as 255 greater than 1 under unsigned rules and as -1 less than 1 under signed rules. Nothing in the bits tells you which rule applies; only the declared type does. That is the bridge to C output questions and to the ALU flag questions in Computer Organization.

Multiplying by $2^k$ is a left shift in both systems. Dividing by $2^k$ is a logical right shift when unsigned and an arithmetic right shift, replicating the sign bit, when signed. Arithmetic right shift rounds towards negative infinity, so -7 shifted right by one gives -4, not -3.

IEEE 754: fields, bias and the implicit one

A normalised value is

where $E$ is the unsigned exponent field, $F$ is the stored fraction, and the leading one before the point is implicit and not stored.

The exponent field is biased rather than signed so that positive floats sort in the same order as the integers formed from their bits. Stored field equals true exponent plus bias: encoding adds, decoding subtracts. Reversing that is the commonest single error in this topic.

Two exponent fields are reserved:

• All zeros. If the fraction is also zero, the value is signed zero. If the fraction is non-zero, the number is denormalised: the implicit leading one is dropped and the value is $0.F \times 2^{-126}$ in single precision. The smallest positive single denormal is $2^{-149}$.
• All ones. Fraction zero means infinity with the given sign. Fraction non-zero means not-a-number.

So the usable normalised exponent fields run from 1 to 254 in single precision, giving true exponents -126 to +127. Not 0 to 255, and not -127 to +128.

One conversion, worked end to end

Encode -6.25 in single precision.

1. Magnitude in binary: 6 is 110 and 0.25 is 0.01, so 6.25 is 110.01.
2. Normalise: $110.01_2 = 1.1001_2 \times 2^2$. The true exponent is 2.
3. Exponent field: $2 + 127 = 129$, which is 10000001.
4. Stored fraction: drop the leading 1, keep 1001, pad to 23 bits.
5. Sign bit: 1, since the number is negative.

The 32 bits are 1 10000001 10010000000000000000000. Grouped into nibbles from the left, that is C0C80000 in hexadecimal. Decoding it back is the same steps in reverse, with the sign bit set:

Spacing, and why a small addend disappears

Within one binade, single-precision numbers are spaced $2^{E - \text{bias}} \times 2^{-23}$ apart, and that spacing doubles each time the exponent increases by one. Near 1.0 the gap is about $1.19 \times 10^{-7}$; near $2^{23}$ the gap is exactly 1.

The consequence is a favourite statement question. The spacing at $2^{24}$ is 2, so $2^{24} + 1$ is not representable and rounds back to $2^{24}$. The largest integer single precision holds exactly is therefore $2^{24} = 16777216$. Add 1 to it repeatedly and the value never moves.

The same effect breaks associativity. With a limited significand, $(a + b) + c$ and $a + (b + c)$ can differ when $a$ is large and $b$ and $c$ are small, because the small values are annihilated one at a time in one grouping and survive by combining in the other. Such questions are often set in three-significant-digit decimal rather than binary. These bounds and formulas are collected in the GATE CSE formula sheet.

The traps, in one list

• Bias applied the wrong way. Add when encoding, subtract when decoding, never both.
• Forgetting the implicit leading one, which loses a factor of roughly two in the decoded value.
• Counting 24 stored fraction bits in single precision. Only 23 are stored; the 24th is implicit.
• Treating exponent fields 0 and 255 as ordinary, which invents values that do not exist and misses denormals, infinity and not-a-number.
• Reading a carry out as signed overflow, or expecting overflow from operands of opposite signs.
• Zero-extending a signed value, or sign-extending an unsigned one.
• Forgetting that sign-magnitude subtraction of extreme opposite values needs one extra bit, because the true difference reaches $2^n - 2$.
• Rounding a numerical answer when the question wanted the exact value. If the answer is 16777216 or $2^{-149}$, enter the exact number, and check for a stated decimal tolerance before rounding anything.

A wider version of this list is in the guide to common mistakes that cost marks. The Digital Logic chapter of the GATE CSE 2027 book goes beyond this article by tabulating every number representation and floating point question form against the years it appeared, with full solutions and the prediction score behind each one.

How to practise

Fix one width and stay in it. Take 8 bits, write out -128, -1, 0, 1 and 127 as patterns, and reproduce them from memory until it is automatic. Then add pairs chosen to overflow and pairs chosen not to, marking both the carry flag and the overflow flag each time.

For floating point, build one small table: the hexadecimal encodings of 1.0, 0.5, -6.25, the smallest normalised value and positive infinity in single precision. Those five cover almost every decode question asked. Convert each in both directions on paper until the bias step needs no second thought. The virtual calculator does not help here; the task is bookkeeping, and bookkeeping is trained by repetition.