GATE GUIDE

GATE ECE Analog Circuits Formula Sheet 2027, With Traps

By MD ANISH AHAMADUpdated 4 Oct 20269 min read
GATE ECE Analog Circuits Formula Sheet 2027, With Traps

A GATE ECE analog circuits formula sheet needs a short list of standard results, not hundreds. Analog Circuits averaged 10.8 marks a paper across the five GATE EC papers counted question by question (2010, 2019, 2020, 2025 and 2026), and most of those marks came from a small set of formulas. This sheet gives each one with a short example of its use and the trap that costs the mark, plus the Electronic Devices formulas that analog questions lean on.

In this guide
  1. Key takeaways
  2. Notation used on this sheet
  3. The diode equation and the thermal voltage
  4. Reading an ideal-diode network
  5. Rectifier averages, clampers and the doubler
  6. Designing a Zener regulator at both corners
  7. BJT small signal: transconductance and the four gains
  8. MOSFET square law and small-signal transconductance
  9. Current mirrors and the differential amplifier
  10. Op-amp amplifiers and the integrator
  11. Active filter cut-off: hertz against radians per second
  12. Schmitt trigger thresholds and hysteresis
  13. Where this sheet fits in your preparation
  14. Quick revision

Key takeaways

Notation used on this sheet

The thermal voltage is VT=kT/qV_T = kT/q, about 26 mV at 300 K. The threshold voltage of a MOSFET is written VthV_{th} here. Some texts write VTV_T for threshold too, so read which one a question means before you substitute.

VmV_m is the peak of a sinusoid. The overdrive is Vov=VGS−VthV_{ov} = V_{GS} - V_{th}. The transconductance gmg_m is the change in output current per volt of input. Small-signal means the small AC variation around the DC operating point, so DC sources become shorts and DC current sources become opens. β\beta is the BJT current gain and ∥\parallel means in parallel.

The diode equation and the thermal voltage

Analog questions borrow these from Electronic Devices, where the diode equation appeared in 2019 Q59, 2025 Q63 and 2026 Q25. The current rises exponentially with forward voltage, scaled by the ideality factor η\eta:

I=IS(eV/ηVT−1),VT=kTqI = I_S\left(e^{V/\eta V_T} - 1\right), \qquad V_T = \frac{kT}{q}
Formula One-line example Watch out for
VT=kT/q≈26 mVV_T = kT/q \approx 26\text{ mV} at 300 K At 360 K, VT=0.026×360/300=31.2 mVV_T = 0.026 \times 360/300 = 31.2\text{ mV} Rescale with temperature whenever the question is not at 300 K
One decade of current needs ΔV=2.3 ηVT\Delta V = 2.3\,\eta V_T η=1\eta = 1: about 60 mV; η=2\eta = 2: about 120 mV The ideality factor is a factor of two hiding in a logarithm
D/μ=kT/q=VTD/\mu = kT/q = V_T (Einstein relation) μ=1000 cm2/V s\mu = 1000\text{ cm}^2/\text{V s} gives D=26 cm2/sD = 26\text{ cm}^2/\text{s} cm²/s against m²/s is a factor of 10410^4

You will take natural logs and exponentials of these on the GATE virtual calculator, so practise the key sequence before the exam.

Reading an ideal-diode network

Ideal-diode networks appeared in four of the five counted papers (2019 Q34, 2020 Q27, 2025 Q57, 2026 Q65 among them). The circuit changes every year; the method does not.

  1. Assume a state for each diode: on (a short) or off (an open).
  2. Solve the linear circuit that results.
  3. Check: an on diode must carry forward current, and an off diode must see a reverse or zero voltage. If either check fails, flip that diode and solve again.

Example: a 5 V source, an ideal diode and a 2 V battery opposing it, in series with 1 kΩ. Assume on: I=(5−2)/1 kΩ=3 mAI = (5 - 2)/1\text{ k}\Omega = 3\text{ mA}. The current is positive, so the assumption holds.

Rectifier averages, clampers and the doubler

Formula One-line example (Vm=10V_m = 10 V) Watch out for
Half-wave: Vavg=Vm/πV_{avg} = V_m/\pi, Vrms=Vm/2V_{rms} = V_m/2 3.183.18 V and 55 V VmV_m is the peak after any diode drops the question specifies
Full-wave: Vavg=2Vm/πV_{avg} = 2V_m/\pi, Vrms=Vm/2V_{rms} = V_m/\sqrt{2} 6.376.37 V and 7.077.07 V A clipper output is not a rectifier: integrate the actual waveform
Clamper: DC shift so one peak sits at the clamp level Clamp the top peak at 0 V: output swings 0 to −20-20 V Peak-to-peak is unchanged at 2Vm2V_m
Voltage doubler: Vo≈2VmV_o \approx 2V_m Vo≈20V_o \approx 20 V Use the peak, not the rms value of the mains

Designing a Zener regulator at both corners

Zener-referenced regulators appeared in 2019 Q48, 2020 Q54 and 2025 Q47. The Zener stays in breakdown only while it carries at least IZ,min⁡I_{Z,\min}. The hardest moment is lowest input with heaviest load, so the series resistor is sized there:

Rs=Vin,min⁡−VZIZ,min⁡+IL,max⁡,IZ,max⁡=Vin,max⁡−VZRs−IL,min⁡R_s = \frac{V_{in,\min} - V_Z}{I_{Z,\min} + I_{L,\max}}, \qquad I_{Z,\max} = \frac{V_{in,\max} - V_Z}{R_s} - I_{L,\min}

Example: VinV_{in} from 15 to 20 V, VZ=10V_Z = 10 V, IZ,min⁡=2I_{Z,\min} = 2 mA, load from 0 to 18 mA. Then Rs=5/20 mA=250 ΩR_s = 5/20\text{ mA} = 250\ \Omega. At the opposite corner, IZ,max⁡=10/250−0=40I_{Z,\max} = 10/250 - 0 = 40 mA, so the Zener dissipates 10×0.04=0.410 \times 0.04 = 0.4 W.

Trap: The resistor is sized at one corner and the Zener power is checked at the opposite corner. A question that asks for both and gets only one is still a lost mark.

BJT small signal: transconductance and the four gains

BJT single-stage amplifiers appeared in four of the five counted papers (2010 Q9, 2020 Q45, 2025 Q21, 2026 Q50 among them). Everything follows from gmg_m. In the examples, IC=1.3I_C = 1.3 mA, β=100\beta = 100, RC=4 kΩR_C = 4\text{ k}\Omega and RE=1 kΩR_E = 1\text{ k}\Omega.

Formula One-line example Watch out for
gm=IC/VTg_m = I_C/V_T 1.3/26=50 mA/V1.3/26 = 50\text{ mA/V} Use ICI_C at the bias point, not the signal current
rπ=β/gmr_\pi = \beta/g_m 100/0.05=2 kΩ100/0.05 = 2\text{ k}\Omega rπr_\pi is in the base; re=VT/IEr_e = V_T/I_E is in the emitter
CE, bypassed: Av=−gmRCA_v = -g_m R_C −200-200 Include any load: RC∥RLR_C \parallel R_L
CE, unbypassed RER_E: Av=−gmRC1+gmRE\displaystyle A_v = \dfrac{-g_m R_C}{1 + g_m R_E} −200/51≈−3.9-200/51 \approx -3.9, close to −RC/RE-R_C/R_E Gain falls and input resistance rises together
Rin=rπ+(β+1)RER_{in} = r_\pi + (\beta + 1)R_E 2+101=103 kΩ2 + 101 = 103\text{ k}\Omega Bias resistors appear in parallel with this
CC (emitter follower): Av≈+1A_v \approx +1 Low output resistance No inversion
CB: Av=+gmRCA_v = +g_m R_C, Rin≈1/gmR_{in} \approx 1/g_m +200+200 and 20 Ω20\ \Omega Same magnitude as CE but non-inverting

Remember: Removing the emitter bypass capacitor lowers the gain and raises the input resistance. Both directions, or the mark is gone.

MOSFET square law and small-signal transconductance

In saturation the drain current follows the square law, valid while VDS≥VGS−VthV_{DS} \ge V_{GS} - V_{th}:

ID=12μnCoxWL (VGS−Vth)2,gm=2IDVov=2μnCoxWL IDI_D = \frac{1}{2}\mu_n C_{ox}\frac{W}{L}\,(V_{GS} - V_{th})^2, \qquad g_m = \frac{2I_D}{V_{ov}} = \sqrt{2\mu_n C_{ox}\frac{W}{L}\,I_D}

Example: μnCox(W/L)=2 mA/V2\mu_n C_{ox}(W/L) = 2\text{ mA/V}^2, VGS=1.5V_{GS} = 1.5 V, Vth=0.5V_{th} = 0.5 V. Then ID=12×2×12=1\displaystyle I_D = \tfrac{1}{2} \times 2 \times 1^2 = 1 mA, valid if VDS≥1V_{DS} \ge 1 V, and gm=2×1/1=2 mA/Vg_m = 2 \times 1/1 = 2\text{ mA/V}. Check whether a question's kk already contains the 12\displaystyle \tfrac{1}{2}.

Device gmg_m depends on current as Current quadrupled
BJT gm∝ICg_m \propto I_C gmg_m quadruples
MOSFET gm∝IDg_m \propto \sqrt{I_D} gmg_m doubles

Carrying the BJT intuition across to a MOSFET is the error the options are written for. It matters for GATE 2027 in particular. In 2019, the one counted paper set by IIT Madras, the analog section had no op-amp and no BJT question, and both amplifier items (Q64 and Q65) were MOS. One paper is a signal, not a law, but make the MOS side as automatic as the BJT side.

The book's last-minute revision sheet carries every Analog Circuits and Electronic Devices formula in this form, with its trap and the counted questions behind it. The Analog Circuits chapter adds 35 questions with worked solutions, among 925 across the GATE ECE 2027 book.

Current mirrors and the differential amplifier

Mirrors and differential pairs appeared in 2010 Q8, 2019 Q65 and 2025 Q43. In the examples, gm=2 mA/Vg_m = 2\text{ mA/V}, RC=10 kΩR_C = 10\text{ k}\Omega and the tail resistance REE=50 kΩR_{EE} = 50\text{ k}\Omega.

Formula One-line example Watch out for
Matched mirror: Iout=IrefI_{out} = I_{ref}; MOS ratioed: Iout=Iref(W/L)2(W/L)1\displaystyle I_{out} = I_{ref}\dfrac{(W/L)_2}{(W/L)_1} 100 μA100\ \mu\text{A} with three times the W/LW/L gives 300 μA300\ \mu\text{A} For a BJT mirror, emitter-area ratio plays the role of W/LW/L
Differential output: Ad=gmRCA_d = g_m R_C 2020 Output taken between the two collectors
Single-ended output: Ad=gmRC/2A_d = g_m R_C/2 1010 The factor of two is the trap
Acm≈−RC/(2REE)A_{cm} \approx -R_C/(2R_{EE}) (single-ended) −10/100=−0.1-10/100 = -0.1 Larger tail resistance, smaller common-mode gain
CMRR=∣Ad/Acm∣\text{CMRR} = \vert A_d/A_{cm} \vert 10/0.1=10010/0.1 = 100, or 40 dB Compare single-ended with single-ended

Op-amp amplifiers and the integrator

Op-amp linear circuits appeared in four of the five counted papers, three times in 2026 alone (Q17, Q53, Q62). With negative feedback, the virtual short makes V+=V−V_+ = V_- and the input currents zero.

Formula One-line example (R1=10 kΩR_1 = 10\text{ k}\Omega, Rf=47 kΩR_f = 47\text{ k}\Omega) Watch out for
Inverting: Av=−Rf/R1A_v = -R_f/R_1 −4.7-4.7 The input resistance is R1R_1, not infinite
Non-inverting: Av=1+Rf/R1A_v = 1 + R_f/R_1 5.75.7 No minus sign, and never below 1
Summer: Vo=−Rf∑kVk/RkV_o = -R_f \sum_k V_k/R_k 1 V and 2 V through 10 kΩ each, Rf=10 kΩR_f = 10\text{ k}\Omega: −3-3 V Each input sees virtual ground
Integrator: Vo=−1RC∫Vin dt\displaystyle V_o = -\dfrac{1}{RC}\displaystyle\int V_{in}\,dt RC=10RC = 10 ms, 1 V in: output ramps at −100 V/s-100\text{ V/s} Add any initial capacitor voltage

In one line: Check for negative feedback first; only then write V+=V−V_+ = V_-.

Active filter cut-off: hertz against radians per second

A first-order active filter has its −3 dB cut-off where the reactance of CC equals RR. This was asked in 2020 Q51 and 2025 Q34.

fc=12πRC Hz,ωc=1RC rad/sf_c = \frac{1}{2\pi RC}\ \text{Hz}, \qquad \omega_c = \frac{1}{RC}\ \text{rad/s}

Example: R=10 kΩR = 10\text{ k}\Omega and C=10C = 10 nF give ωc=104\omega_c = 10^4 rad/s and fc≈1.59f_c \approx 1.59 kHz. Read the unit the answer box asks for, because the other value is exactly 2π2\pi away.

Schmitt trigger thresholds and hysteresis

A Schmitt trigger feeds the output back to the non-inverting input, so the output sits at ±Vsat\pm V_{sat} and switches when the input crosses a threshold. For the inverting form, with R1R_1 from the non-inverting input to ground and R2R_2 from the output to that input:

VTH=±R1R1+R2Vsat,hysteresis=VUT−VLTV_{TH} = \pm\frac{R_1}{R_1 + R_2}V_{sat}, \qquad \text{hysteresis} = V_{UT} - V_{LT}

Example: Vsat=12V_{sat} = 12 V, R1=10 kΩR_1 = 10\text{ k}\Omega, R2=20 kΩR_2 = 20\text{ k}\Omega. The thresholds are ±4\pm 4 V and the hysteresis is 8 V. This circuit last appeared in 2020 Q18. Do not write a node equation with V+=V−V_+ = V_- here.

Where this sheet fits in your preparation

Analog Circuits is the third-largest technical section by counted marks, behind Networks and Engineering Mathematics, as the GATE ECE subject-wise weightage shows. The GATE ECE important topics guide ranks the recurring concepts across every section. Many analog items are MCQs, and the marking scheme, which is common to every GATE paper, deducts marks only for wrong MCQ answers. Read this sheet daily in the last two months, attaching the trap to each formula as you go.

More formula sheets: all of GATE ECE · Communications · Electromagnetics · Signals and Systems

Quick revision

  1. Decide every diode state first, then check it against current and voltage signs.
  2. Half-wave average Vm/πV_m/\pi, full-wave 2Vm/π2V_m/\pi; a clamper keeps peak-to-peak unchanged.
  3. Size the Zener resistor at minimum input and maximum load, then check power at the opposite corner.
  4. gm=IC/VTg_m = I_C/V_T, rπ=β/gmr_\pi = \beta/g_m, CE gain −gmRC-g_m R_C, divided by 1+gmRE1 + g_m R_E when unbypassed.
  5. MOSFET gm=2ID/Vovg_m = 2I_D/V_{ov} grows as ID\sqrt{I_D}; BJT gmg_m grows as ICI_C.
  6. Differential pair: gmRCg_m R_C differential output, gmRC/2g_m R_C/2 single-ended.
  7. Inverting −Rf/R1-R_f/R_1, non-inverting 1+Rf/R11 + R_f/R_1, but only with negative feedback.
  8. Cut-off 1/(2πRC)1/(2\pi RC) in Hz, 1/RC1/RC in rad/s; Schmitt thresholds ±R1Vsat/(R1+R2)\pm R_1 V_{sat}/(R_1 + R_2).

Frequently asked questions

What is the formula for gm of a BJT and of a MOSFET?

For a BJT, gm=IC/VTg_m = I_C/V_T with VT≈26V_T \approx 26 mV at room temperature, so the transconductance is proportional to collector current. For a MOSFET in saturation, gm=2ID/Vov=2μnCox(W/L)IDg_m = 2I_D/V_{ov} = \sqrt{2\mu_n C_{ox}(W/L)I_D}, so it grows only as the square root of drain current. Quadrupling the current quadruples the BJT value but only doubles the MOSFET value.

What happens to a CE amplifier when the emitter bypass capacitor is removed?

The emitter resistor is no longer shorted for signals, so it degenerates the gain. The voltage gain falls from −gmRC-g_m R_C to −gmRC/(1+gmRE)-g_m R_C/(1 + g_m R_E), close to −RC/RE-R_C/R_E when gmREg_m R_E is large. The input resistance rises from rπr_\pi to rπ+(β+1)REr_\pi + (\beta + 1)R_E. Questions on this circuit test both directions, so state both changes.

How do you find the series resistor of a Zener regulator?

Size it at the worst corner for keeping the Zener in breakdown, which is minimum input voltage with maximum load current. That gives Rs=(Vin,min⁡−VZ)/(IZ,min⁡+IL,max⁡)R_s = (V_{in,\min} - V_Z)/(I_{Z,\min} + I_{L,\max}). Then check the opposite corner, maximum input with minimum load, where the Zener current and power are largest. Solving only one corner leaves half the question unanswered.

Why is single-ended differential amplifier gain half the differential gain?

A differential input splits equally between the two transistors, so each collector swings by only half the full output. Taking the output between the two collectors gives Ad=gmRCA_d = g_m R_C. Taking it from one collector to ground gives gmRC/2g_m R_C/2. When you compute CMRR, use the single-ended differential gain against the single-ended common-mode gain, so both refer to the same output.

Does the virtual short apply to a Schmitt trigger?

No. The virtual short holds only when the op-amp has negative feedback. A Schmitt trigger uses positive feedback, so its output sits at one saturation level and the two inputs are not equal. Find the thresholds from the voltage divider on the non-inverting input instead. The switching points are the values of input that make the two op-amp inputs equal at that instant.

Sources

Dates, fees and the syllabus are set by the GATE 2027 organising institute and can change. Always confirm at gate2027.iitm.ac.in.

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